Computer Architecture, Networking
Networks on Chips
Technology And Tools
Author:
De Micheli, Giovanni (EDT)/ Benini, Luca (EDT)
Isbn 13:
9780123705211
ISBN: 0123705215
Pub Date:
Jul 1, 2006
Publisher:
Academic Press
Shipping Weight: 2.20 pounds
Status:
Ships 4-9 days CALL RUSH SHIP
Quantum Price: $63.86
Quantity in Basket: None
The billion-transistor era of application specific semiconductor chips is on the horizon. The design of such chips for various applications, such as telecommunications, poses various challenges due to the complexity of these systems. With advanced semiconductor technologies, below the 65 nanometer node, Systems on Chips can integrate numerous, complex functional units, such as processors and controllers. These highly complex system-on-chips demand new approaches to connect and manage the communication between on-chip processing and storage components. To overcome the limitations of traditional bus-based methods, while maintaining compatibility with existing interface standards and design tool flows, Networks on Chips NoCs provide a powerful solution. Within the NoC paradigm, designers borrow models, techniques, and tools from the network design field and apply them to SoCs design. In other words, a SoC is viewed as a micronetwork of components. The network is the abstraction of the communication among the components and has to satisfy quality of service QoS requirements e.g., reliability, performance, and energy bounds under the limitation of intrinsic, unreliable signal transmission and nonneglibible communication delays on wires. Whereas complex NoC-based SoCs have been already successfully fabbed and tested e.g., ST Microelectronics; Arteris , design technologies for NoCs are still in their infancy. This book aims at providing a unified overview of NoC technology.
view
more info, including table of contents
(opens in pop-up window)
